1. Field of the Invention
Embodiments of the present invention relate generally to multi-GPU systems and more specifically to a method and system for sideband access to display configuration information in a multi-GPU system via a controller, such as an embedded controller, an I2C controller, Aux Bus controller or other device capable of reading display configuration.
2. Description of the Related Art
Unless otherwise indicated herein, the approaches described in this section are not prior art to the claims in this application and are not admitted to be prior art by inclusion in this section.
To satisfy users' continued demands for graphics applications that offer rich visual effects and interactive features, various multi-graphics-processing-unit (multi-GPU) solutions have been proposed to handle the computationally-intensive operations that are needed in such graphics applications. One solution is to supplement the integrated graphics subsystem of a main computing system with an enhanced graphics subsystem. So, the main computing system can make use of the enhanced graphics subsystem to perform all rendering or assist in accelerating rendering and even drive the processed data in the frame buffer of the enhanced graphics subsystem to a display device attached to the enhanced graphics subsystem. Such a display device is herein referred to as an “add-on display device” and is often the preferred display device for the multi-GPU system, because it supports different technologies that address some of the shortcomings in the older analog display devices. Also, the GPU in the integrated graphics subsystem is herein referred to as the motherboard GPU (mGPU), and the GPU in the enhanced graphics subsystem is referred to as the discrete GPU (dGPU).
However, there currently lacks a mechanism to seamlessly transition between the integrated graphics subsystem and the enhanced graphics subsystem. In particular, in a conventional multi-GPU solution, switching between these two subsystems requires a cumbersome process of rebooting and also re-enumerating the various display devices that are attached to the two graphics subsystems. Furthermore, the dGPU in the enhanced graphics subsystem is sometimes powered-down in the conventional multi-GPU solution to reduce power consumption. During this power-down period in which the dGPU is unavailable, the add-on display device also becomes inaccessible. In other words, the current multi-GPU solution is unable to detect hot-plug events (e.g., attachment or detachment of the add-on display device) or receive any specification data associated with the add-on display device via the Display Data Channel, an Auxiliary Channel bus or other Display Configuration bus (collectively, DDC/AUX) while the dGPU is turned-off, further complicating the process of switching between the two graphics subsystems.
As the foregoing illustrates, what is needed is an improved way of accessing the add-on display device without significantly modifying the software stack to be executed on a multi-GPU system to enable the seamless transitions between the various graphics subsystems in such a system and address at least the problems set forth above.